coreboot Asrock H110 Pro BTC+
coreboot Asrock H110 Pro BTC+
Coreboot mod by our member " walterav " make Asrock H110 Pro BTC+ almost 100% functional.In this new topic we are going to test this mod.
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Onboard I219-V LAN works on Asrock H110 Pro BTC+ !
Compiled own coreboot.rom using all defaults, but edited "devicetree.cb" to mimic older legacy pci definitions with extra disabled 1f.6 location found here look at the end of the file.
https://www.coreboot.org/fossology/?mod ... &item=9156
While the current devicetree.cb shows "ref" block definitions without mentioning location "1f.6":
https://github.com/coreboot/coreboot/bl ... icetree.cb
So I changed devicetree.cb to:
I also added the "flashdescription region3 GbE" to the coreboot rom which also used original "Descriptor and ME" regions:
PCI-E Switch ASM1187e 7-Port PCIe x1 Gen2 Packet Switch detected using these "devicetree.cb" edits:
Tested 7 different devices in all the white PCI-E asmedia switched slots at the same time, and some of the network adapters with option roms are even loaded in SeaBIOS and shows numbered PXE boot options besides the SATA/USB ! The OS detects all 7 devices!
Also tested all black 6x pci-e slots with 1X length devices, but the slot called PCIE5 won't detect device, maybe because numbering of PCI devices ends with 06 with that being the ASmedia switch controller...?
IGPU
Also onboard igpu libgfxinit works in text mode in SeaBIOS by just adding "select MAINBOARD_HAS_LIBGFXINIT" to Kconfig file from the onboard DVI connector linked to a HDMI screen. This works for both G4400 Skylake and G3950 Kabylake gpu!
Join our telegram group if you wana chat or have specific questions:
https://t.me/+h2K5CX5jEZA0MWJk

Onboard I219-V LAN works on Asrock H110 Pro BTC+ !
Compiled own coreboot.rom using all defaults, but edited "devicetree.cb" to mimic older legacy pci definitions with extra disabled 1f.6 location found here look at the end of the file.
https://www.coreboot.org/fossology/?mod ... &item=9156
Code: Select all
end # LPC Interface
device pci 1f.1 on end # P2SB
device pci 1f.2 on end # Power Management Controller
device pci 1f.3 on # Intel HDA
register "PchHdaVcType" = "Vc1"
end
device pci 1f.4 on end # SMBus
device pci 1f.5 on end # PCH SPI
device pci 1f.6 off end # GbE <--- Extra port which contains I219-V but disabled
end
end
https://github.com/coreboot/coreboot/bl ... icetree.cb
Code: Select all
end # chip superio/common
chip drivers/pc80/tpm
device pnp 4e.0 on end # TPM module
end
end
device ref hda on
register "PchHdaVcType" = "Vc1"
end
device ref smbus on end
device ref fast_spi on end
end
end
Code: Select all
end # chip superio/common
chip drivers/pc80/tpm
device pnp 4e.0 on end # TPM module
end
end
device ref hda on
register "PchHdaVcType" = "Vc1"
end
device ref smbus on end
device ref fast_spi on end
device pci 1f.6 on end # <--- enables I219-V onboard
end
end
Code: Select all
ifdtool coreboot-1f6pci.rom -i Gbe:flashregion_3_gbe.bin
PCI-E Switch ASM1187e 7-Port PCIe x1 Gen2 Packet Switch detected using these "devicetree.cb" edits:
Code: Select all
..............................
device ref pcie_rp7 on
register "PcieRpEnable[6]" = "1"
register "PcieRpClkReqSupport[6]" = "1"
register "PcieRpClkReqNumber[6]" = "3"
register "PcieRpAdvancedErrorReporting[6]" = "1"
register "PcieRpLtrEnable[6]" = "1"
register "PcieRpClkSrcNumber[6]" = "3"
register "PcieRpHotPlug[6]" = "1"
end
### original code above ^^^
device pci 1d.0 on
register "PcieRpEnable[8]" = "1"
register "PcieRpClkReqSupport[8]" = "1"
register "PcieRpClkReqNumber[8]" = "4"
register "PcieRpAdvancedErrorReporting[8]" = "1"
register "PcieRpLtrEnable[8]" = "1"
register "PcieRpClkSrcNumber[8]" = "4"
register "PcieRpHotPlug[8]" = "1"
end
device pci 1d.1 on
register "PcieRpEnable[9]" = "1"
register "PcieRpClkReqSupport[9]" = "1"
register "PcieRpClkReqNumber[9]" = "5"
register "PcieRpAdvancedErrorReporting[9]" = "1"
register "PcieRpLtrEnable[9]" = "1"
register "PcieRpClkSrcNumber[9]" = "5"
register "PcieRpHotPlug[9]" = "1"
end
### original code below
device ref lpc_espi on
subsystemid 0x1849 0x1a43
# Set @0x280-0x2ff I/O Range for SuperIO HWM
register "gen1_dec" = "0x007c0281"
# Set LPC Serial IRQ mode
register "serirq_mode" = "SERIRQ_CONTINUOUS"
....................
lspci
Also tested all black 6x pci-e slots with 1X length devices, but the slot called PCIE5 won't detect device, maybe because numbering of PCI devices ends with 06 with that being the ASmedia switch controller...?
IGPU
Also onboard igpu libgfxinit works in text mode in SeaBIOS by just adding "select MAINBOARD_HAS_LIBGFXINIT" to Kconfig file from the onboard DVI connector linked to a HDMI screen. This works for both G4400 Skylake and G3950 Kabylake gpu!
Re: coreboot Asrock H110 Pro BTC+
The built-in intel Gbe option ROM can also be included during coreboot build time, by adding the following line to "Kconfig":
select MAINBOARD_USES_IFD_GBE_REGION
From the make menuconfig chipset you can than enable the "Add gigabit ethernet configuration" and give location for the GBE.BIN file just like FD and ME BIN files extracted from the original firmware backup file(ifdtool -x). You may also remove the realtek related stuff from Kconfig since that has no purpose for the H110 Pro BTC+...
select MAINBOARD_USES_IFD_GBE_REGION
From the make menuconfig chipset you can than enable the "Add gigabit ethernet configuration" and give location for the GBE.BIN file just like FD and ME BIN files extracted from the original firmware backup file(ifdtool -x). You may also remove the realtek related stuff from Kconfig since that has no purpose for the H110 Pro BTC+...
Re: coreboot Asrock H110 Pro BTC+
IGPU
The graphics initialization for the igpu using "libgfxinit" in "txt mode" and SeaBIOS is compatible with both IGPU and or PCIE 16X slot used GPU from AMD/NVIDIA at the same time. It can show SeaBIOS screen on both devices. Also the G4900T CoffeeLake iGPU works fine!
Using onboard GPU with libgfxinit in UEFI ED2K Tianocore for only the integrated GPU needs the full framebuffer mode setting instead of txt mode. This is however not compatible with PCIE 16X slot used GPU from AMD/NVIDIA. It will blackscreen on the PEG16X inserted GPU's, but after boot of OS it may function.
The graphics initialization for the igpu using "libgfxinit" in "txt mode" and SeaBIOS is compatible with both IGPU and or PCIE 16X slot used GPU from AMD/NVIDIA at the same time. It can show SeaBIOS screen on both devices. Also the G4900T CoffeeLake iGPU works fine!
Using onboard GPU with libgfxinit in UEFI ED2K Tianocore for only the integrated GPU needs the full framebuffer mode setting instead of txt mode. This is however not compatible with PCIE 16X slot used GPU from AMD/NVIDIA. It will blackscreen on the PEG16X inserted GPU's, but after boot of OS it may function.