coreboot on ASRock H110M-DVS rev 3.0 and rev 2.0 and me_cleaner

[walterav]

Good news @james2 that you confirmed a working backup rom to start with.

You have 2 options to include the coreboot from my build which probably included a broken ifd/me region since it was based on the original rom.

ONE
If you have a working OEM bios booting right now, you may flash externally only the BIOS region.

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sudo flashrom -p someprogrammer -r wholegoodoem.rom #create a good backup
ifdtool -f layout.txt wholegoodoem.rom #don't use the corebootrom use your good oem backup to create a layout file 
#sudo flashrom -p someprogrammer --ifd -i bios -w mylatestcoreboot.rom #probably won't work when external flashing?
sudo flashrom -p someprogrammer -l layout.txt -i bios mylatestcoreboot.rom #whole 8MB image, flashrom will pull the correct region!

My guess is although that a external programmer cannot use the --ifd option, therefor use the -l layout option but first extract a good layout?

or TWO

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sudo flashrom -p someprogrammer -r wholegoodoem.rom
ifdtool -x mylatestcoreboot.rom #flashregion_1_bios.bin contains bios(coreboot)
ifdtool -i BIOS:flashregion_1_bios.bin wholegoodoem.rom -p sklkbl
sudo flashrom -p someprogrammer -w wholegoodoem.rom.new

Extract the coreboot region from my latest rom and include it with ifdtool in your current OEM good whole rom and flash the whole new rom?

When using a broken ifd by not using the -p sklkbl quirks can lead to system powering on and doing nothing symptom...

[james2]

thanks @walterav,
I tried all of the above options and everytime no boot, no keyboard reaction (usbkb) no video, nadda.
has anyone got this board to work?

[david]

thanks @walterav,
I tried all of the above options and everytime no boot, no keyboard reaction (usbkb) no video, nadda.
has anyone got this board to work?

I will disasemble my working mini PC MACOS rev.3.0 board just to test this ) and will update!

I do have DVI to hdmi , only problem i have 3200Mhz DDR4 so let hope will not make problem with this with coreboot!

1.All good

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root@devuan:/home/xxx# flashrom -p internal -r wholegoodoem.rom
flashrom unknown on Linux 6.1.0-37-amd64 (x86_64)
flashrom is free software, get the source code at https://flashrom.org

Using clock_gettime for delay loops (clk_id: 1, resolution: 1ns).
Found chipset "Intel H110".
Enabling flash write... SPI Configuration is locked down.
FREG0: Flash Descriptor region (0x00000000-0x00000fff) is read-write.
FREG1: BIOS region (0x00200000-0x007fffff) is read-write.
FREG2: Management Engine region (0x00001000-0x001fffff) is read-write.
Enabling hardware sequencing because some important opcode is locked.
OK.
Found Programmer flash chip "Opaque flash chip" (8192 kB, Programmer-specific) on internal.
Reading flash... done.

2.

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/ifdtool -f layout.txt /home/xxx/wholegoodoem.rom 
Warning: No platform specified. Output may be incomplete
File /home/xxx/wholegoodoem.rom is 8388608 bytes
Wrote layout to layout.txt

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00000000:00000fff fd
00200000:007fffff bios
00001000:001fffff me
00fff000:00000fff gbe
00fff000:00000fff pd

3 Let compare Layouts of both roms

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h110m_dvs_r3_cb_edk2mrcb2505igpuanddgpunct6776.rom
00000000:00000fff fd
00200000:007fffff bios
00001000:001fffff me
00fff000:00000fff gbe
00fff000:00000fff pd

wholegoodoem.rom
00000000:00000fff fd
00200000:007fffff bios
00001000:001fffff me
00fff000:00000fff gbe
00fff000:00000fff pd

They are same!

4. Let flash bios part! (i don`t think fd need to be flashed back just the bios part)

flashrom -p internal -l layout.txt -i bios -w Downloads/h110m_dvs_r3_cb_edk2mrcb2505igpuanddgpunct6776.rom

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flashrom unknown on Linux 6.1.0-37-amd64 (x86_64)
flashrom is free software, get the source code at https://flashrom.org

Using clock_gettime for delay loops (clk_id: 1, resolution: 1ns).
Using region: "bios".
Found chipset "Intel H110".
Enabling flash write... SPI Configuration is locked down.
FREG0: Flash Descriptor region (0x00000000-0x00000fff) is read-write.
FREG1: BIOS region (0x00200000-0x007fffff) is read-write.
FREG2: Management Engine region (0x00001000-0x001fffff) is read-write.
Enabling hardware sequencing because some important opcode is locked.
OK.
Found Programmer flash chip "Opaque flash chip" (8192 kB, Programmer-specific) on internal.
Warning: Address range of region "pd" exceeds the current chip's address space.
Error: Size of the address range of region "pd" is not positive.
Warning: Address range of region "gbe" exceeds the current chip's address space.
Error: Size of the address range of region "gbe" is not positive.
Requested regions can not be handled. Aborting.

I`m getting error with this command i need to check is this is all good.

i used this command and it worked not sure is this is flashing only "bios part"

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flashrom -p internal --ifd -i bios -w Downloads/h110m_dvs_r3_cb_edk2mrcb2505igpuanddgpunct6776.rom 
flashrom unknown on Linux 6.1.0-37-amd64 (x86_64)
flashrom is free software, get the source code at https://flashrom.org

Using clock_gettime for delay loops (clk_id: 1, resolution: 1ns).
Found chipset "Intel H110".
Enabling flash write... SPI Configuration is locked down.
FREG0: Flash Descriptor region (0x00000000-0x00000fff) is read-write.
FREG1: BIOS region (0x00200000-0x007fffff) is read-write.
FREG2: Management Engine region (0x00001000-0x001fffff) is read-write.
Enabling hardware sequencing because some important opcode is locked.
OK.
Found Programmer flash chip "Opaque flash chip" (8192 kB, Programmer-specific) on internal.
Reading ich descriptor... done.
Using region: "bios".
Reading old flash chip contents... done.
Erasing and writing flash chip... Erase/write done.
Verifying flash... VERIFIED.

youtu.be/tli8QfAHCW8

[james2]

so I just tried just about everything with @walterav's roms, even booting into working bios and internal flashing just the roms with --no-verify opt.

unfortunately nothing. I will try from scratch again. I can't see what I am missing. :S maybe there is some lock somewhere.

[james2]

thanks @walterav,
I tried all of the above options and everytime no boot, no keyboard reaction (usbkb) no video, nadda.
has anyone got this board to work?

I will disasemble my working mini PC MACOS rev.3.0 board just to test this ) and will update!

I do have DVI to hdmi , only problem i have 3200Mhz DDR4 so let hope will not make problem with this with coreboot!

1.All good

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root@devuan:/home/xxx# flashrom -p internal -r wholegoodoem.rom
flashrom unknown on Linux 6.1.0-37-amd64 (x86_64)
flashrom is free software, get the source code at https://flashrom.org

Using clock_gettime for delay loops (clk_id: 1, resolution: 1ns).
Found chipset "Intel H110".
Enabling flash write... SPI Configuration is locked down.
FREG0: Flash Descriptor region (0x00000000-0x00000fff) is read-write.
FREG1: BIOS region (0x00200000-0x007fffff) is read-write.
FREG2: Management Engine region (0x00001000-0x001fffff) is read-write.
Enabling hardware sequencing because some important opcode is locked.
OK.
Found Programmer flash chip "Opaque flash chip" (8192 kB, Programmer-specific) on internal.
Reading flash... done.

2.

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/ifdtool -f layout.txt /home/xxx/wholegoodoem.rom 
Warning: No platform specified. Output may be incomplete
File /home/xxx/wholegoodoem.rom is 8388608 bytes
Wrote layout to layout.txt

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00000000:00000fff fd
00200000:007fffff bios
00001000:001fffff me
00fff000:00000fff gbe
00fff000:00000fff pd

3 Let compare Layouts if both roms

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h110m_dvs_r3_cb_edk2mrcb2505igpuanddgpunct6776.rom
00000000:00000fff fd
00200000:007fffff bios
00001000:001fffff me
00fff000:00000fff gbe
00fff000:00000fff pd

wholegoodoem.rom
00000000:00000fff fd
00200000:007fffff bios
00001000:001fffff me
00fff000:00000fff gbe
00fff000:00000fff pd

They are same!

4. Let flash bios part! (i don`t think fd need to be flashed back just the bios part)

flashrom -p internal -l layout.txt -i bios -w Downloads/h110m_dvs_r3_cb_edk2mrcb2505igpuanddgpunct6776.rom

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flashrom unknown on Linux 6.1.0-37-amd64 (x86_64)
flashrom is free software, get the source code at https://flashrom.org

Using clock_gettime for delay loops (clk_id: 1, resolution: 1ns).
Using region: "bios".
Found chipset "Intel H110".
Enabling flash write... SPI Configuration is locked down.
FREG0: Flash Descriptor region (0x00000000-0x00000fff) is read-write.
FREG1: BIOS region (0x00200000-0x007fffff) is read-write.
FREG2: Management Engine region (0x00001000-0x001fffff) is read-write.
Enabling hardware sequencing because some important opcode is locked.
OK.
Found Programmer flash chip "Opaque flash chip" (8192 kB, Programmer-specific) on internal.
Warning: Address range of region "pd" exceeds the current chip's address space.
Error: Size of the address range of region "pd" is not positive.
Warning: Address range of region "gbe" exceeds the current chip's address space.
Error: Size of the address range of region "gbe" is not positive.
Requested regions can not be handled. Aborting.

I`m getting error with this command i need to check is this is all good.

i got same error I just deleted them from the layout.txt

Thanks for the video Mine does exactly the same as yours and I am using 2400 Gskill 2 x 16GB https://www.amazon.com/G-SKILL-Ripjaws- ... B077Q8KWM1

I just did the same process with your original meclean_seabios also, didnt work.

[david]

Thanks for the video Mine does exactly the same as yours and I am using 2400 Gskill 2 x 16GB

I just did the same process with your original meclean_seabios also, didnt work.

So maybe is not the memory then if you have 2400 can you test only with 1 ddr4 module ?

@walterav upload ready to build zip file of your new coreboot so we can check it more easy i`m not sure what it need to be replaced )
So will be good if you just upload the zip folder of your coreboot moded version so we can try to build manualy and test.

I`m waiting worming up the rasperry pi 2 to flash again cos now board is dead

[walterav]

@david and @james2

Memory speed can indeed be a thing since on OEM bios on H110 Pro BTC+ I aways had to force it to 2133 although some modules were 2400 compatible. If I forced it to 2400 with compatible modules it was always a blackscreen/quick poweron followed by poweroff until I cleared CMOS. My current machine uses mixed 4GB dimms but I'm sure it picks the lowest speed and it may therefore work? The asrock website indeed only listen 2133 as a valid speed for skylake.... and 2400 for kabylake which I also have Xeon 1270v6. But it doesn't work for my xeon at that speed....

@david I noticed there was no COIN cell battery in your board in the Video. Does it poweron on with a coin cell battery in it and does it stay powered on or did you shut it down manually? Do you use a kabylake/skylake cpu or a coffeelake since the later I haven't been able to get working in coreboot only the cheap coffeelake celeron which requires no mods. Not sure if I build it with coffeelake microcode check the config.

Have you both tried moving the CMOS jumper (shortly) from "normal" to "clear" and back to "normal" while it was on for ~15 seconds, it will take almost a minute after that before post screen occurs both iGPU/dGPU? Do this test with your coin cell battery installed!

@david
Sources are on review.coreboot.org just download the whole archive and extract the lga1151-boards folder, my config used can be extracted from the rom you already have.

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cbfstool mycoreboot.rom print #shows layout/partitions 
cbfstool mycoreboot.rom extract -n revision -f revision.txt # shows used revision for build
cbfstool mycoreboot.rom extract -n config -f dotconfigfile

SERIAL...
I'm sorry all the time I thought you guys would have a serial COM output option port/header on the board but its not there looking at the pictures again, therefore you may build a image without any of the NCT6776 code in Kconfig nor devicetree, but you will lose PS2 / fan control if it worked. I was mistaken the Asrock H110M HDV board, so without a serial port working its pretty hard to debug.

USB-DEBUG:
With a raspberry pi-zero not a normal pi it may be possible to use USB-debug on a certain port on this board to spit out the coreboot-console error messages?

About RAM, if you run MEMTEST86+ does it show RAM module slot0 and slot2 or slot0 and slot1?

[david]

@david

USB-DEBUG:
With a raspberry pi-zero not a normal pi it may be possible to use USB-debug on a certain port on this board to spit out the coreboot-console error messages?

Our telegram member told me he tested on rev.2.0 with 2800 Ram and told me coreboot worked just is seting the memory to 2400 automaticaly.

I did tested with my G4560 that is kaby lake CPU and can work with 2400 ram for sure.
I also tested with 9600k and board act the same way no matter what cpu i use as it shown in the video i tested on integrated GPU and external Radeon 560 GPU.

I did returned the CMOS battery was just testing with and without to see it make no diffrence.


UPDATE 2

It seems this board do not have serial so we need to use coreboot EHCI Debug Port

A USB A-A cable (sometimes called a “debug cable”). - I do have such a cable here !

AI help give as potentialy how we can try to use it !

1. What is EHCI Debug Port?

Intel chipsets with USB2 (EHCI) support a Debug Port: one USB port can be reserved during early boot as a console for firmware.

Coreboot can send its debug logs there instead of a UART.

That means you don’t need a COM header — logs come out of a USB port.

To capture them, another computer (e.g. your Raspberry Pi 2) must act as a USB Debug Host.

2. Which USB port on ASRock H110M-DVS R3.0 supports debug?

On Intel Skylake/H110 chipsets, only one EHCI port can be used as debug.

Typically it’s one of the rear USB 2.0 ports, not the USB3 ones and not the front panel header.

Coreboot lets you select which port in make menuconfig:
Console ---> [*] Enable USB debug console
(0-5) Debug port number

You may need to try ports until you find the right one (rear USB2 is the best starting point).

Setup:

On the ASRock board:

Pick a rear USB2 port.

Plug a USB cable from that port → into the Pi’s USB Host port.

On the Raspberry Pi (running Linux):

Enable USB debugging support:

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sudo modprobe usbmon
sudo modprobe ehci-hcd
sudo modprobe usb_debug

Use dmesg to confirm the debug device is recognized.

Run usbdebug or dbgp tool from coreboot’s utilities to capture output.
Example:

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sudo usbdebug -l
sudo usbdebug > coreboot.log

Boot the ASRock board with coreboot → logs should appear on the Pi.

[james2]

I tested with 1 ddr4, cmos resetting, etc.. There is one other direction I will go down, which is to build with kaby lake generic board on coreboot settings (not asrock -h100m-rev2 base) and do all the config manually, because my hunch is something of the h110m-rev2 base is tripping it up.

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i.e: make menuconfig.
mb: intel 
model: Mainboard model (Kabylake DDR4 RVP8)
(H110M-DVS R3.0) Mainboard part number                                                   
                (ASROCK) Mainboard vendor name                                                           
                       ROM chip size (8192 KB (8 MB))  --->                                                
                      System Power State after Failure (S0 Full On)  --->                                  
                  ()  fmap description file in fmd format                                                  
                   (0x200000) Size of coreboot owned area in ROM 

[david]

How to get @walterav build:
https://review.coreboot.org/c/coreboot/+/88895

install on debian / devuan:

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sudo apt-get install -y bison build-essential curl flex git gnat libncurses-dev libssl-dev zlib1g-dev pkgconf python-is-python3

Clone original coreboot:

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git clone https://review.coreboot.org/coreboot.git
cd coreboot

Fetch the change:
Each Gerrit change has a "Download" section with the exact git fetch command.
For change 88895, you can do:

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git fetch https://review.coreboot.org/coreboot refs/changes/95/88895/1 && git checkout FETCH_HEAD

The trailing /1 means patchset 1. If there are newer patchsets, you’d use /2, /3, etc.

Confirm you’re on the right commit:

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git log -1

Then build:

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make crossgcc-i386 CPUS=$(nproc)

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make -C payloads/coreinfo olddefconfig
make -C payloads/coreinfo

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make menuconfig