SiFive come with World first U500 and E500 Open Source RISC-V SoCs
Posted: Tue Jul 12, 2016 1:43 pm
SiFive will publish specifications for an SoC based high-performance Unix-capable cache-coherent 64-bit multiprocessor U500 and one using a microcontroller core E300 both based on work of the RISC-V Foundation. RISC-V instructions set is free, compared to $40,000 ARM license for startups using Cortex M0 MCU!
http://www.iot-tech.dev/full.php?ar=51
http://www.iot-tech.dev/full.php?ar=51